Optimizing Accelerator on FPGA for Deep Convolutional Neural Networks.
Yong DongWei HuYonghao WangQiang JiaoShuang ChenPublished in: ICA3PP (2) (2020)
Keyphrases
- convolutional neural networks
- field programmable gate array
- convolutional network
- hardware implementation
- embedded systems
- fpga implementation
- real time image processing
- parallel computing
- parallel implementation
- verilog hdl
- hardware architecture
- hardware design
- signal processing
- high speed
- low cost
- image processing algorithms
- data acquisition
- image registration
- image processing
- real time
- low power consumption
- xilinx virtex
- hardware architectures
- hardware description language
- machine learning
- data sets