A Novel Low Power Technique for FinFET Domino OR Logic.
Vijay Kumar SharmaPublished in: J. Circuits Syst. Comput. (2021)
Keyphrases
- low power
- logic circuits
- high speed
- low cost
- power consumption
- delay insensitive
- high power
- vlsi circuits
- digital signal processing
- vlsi architecture
- gate array
- low power consumption
- wireless transmission
- single chip
- real time
- asynchronous circuits
- cmos technology
- power dissipation
- image sensor
- power reduction
- mixed signal
- signal processor