A reconfigurable processor array with routing LSIs and general purpose DSPs.
Jacob LevisonIchiro KurodaTakao NishitaniPublished in: ASAP (1992)
Keyphrases
- general purpose
- processor array
- parallel algorithm
- interconnection networks
- parallel implementation
- shared memory
- mesh connected
- parallel computers
- routing algorithm
- application specific
- domain specific
- field programmable gate array
- array processor
- routing protocol
- low cost
- artificial intelligence
- hardware implementation
- computer systems
- graphical models
- power consumption
- semantic network
- co occurrence
- digital signal processors