A low power 720p motion estimation processor with 3D stacked memory.
Shuping ZhangJinjia ZhouDajiang ZhouSatoshi GotoPublished in: VLSI-SoC (2014)
Keyphrases
- low power
- motion estimation
- high speed
- single chip
- gate array
- power consumption
- low cost
- power dissipation
- image sequences
- high power
- motion compensated
- motion compensation
- digital signal processing
- motion vectors
- wireless transmission
- vlsi architecture
- low power consumption
- inter frame
- video coding
- video compression
- video sequences
- optical flow
- vlsi circuits
- signal processor
- real time
- power reduction
- parallel processing
- logic circuits
- computational complexity
- image sensor
- frame rate
- cmos technology
- mixed signal
- random access
- low complexity
- rate distortion