A 52mW 10b 210MS/s two-step ADC for digital-IF receivers in 0.13μm CMOS.

Zhiheng Cao Shouli Yan

Published in: CICC (2008)

Keyphrases

analog to digital converter
power consumption
power supply
hd video
circuit design
low power
cmos image sensor
high speed
image sensor
high definition
single chip
low cost
data sets
decision support system
delay insensitive
vlsi circuits
image sequences
metadata
genetic algorithm