The development of high performance FFT IP cores through hybrid low power algorithmic methodology.
Wei HanAhmet T. ErdoganTughrul ArslanMohd. HasanPublished in: ASP-DAC (2005)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- low power consumption
- signal processor
- single chip
- wireless transmission
- logic circuits
- vlsi circuits
- digital signal processing
- power reduction
- vlsi architecture
- high power
- mixed signal
- signal processing
- digital camera
- floating point
- cmos technology
- frequency domain
- delay insensitive