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Modeling and Mitigating Transient Errors in Logic Circuits.
Ilia Polian
John P. Hayes
Sudhakar M. Reddy
Bernd Becker
Published in:
IEEE Trans. Dependable Secur. Comput. (2011)
Keyphrases
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logic synthesis
logic circuits
low power
heuristic search
functional decomposition
steady state
computer vision
high speed
risk management