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Power-Efficient RAM Mapping Algorithms for FPGA Embedded Memory Blocks.
Russell Tessier
Vaughn Betz
David Neto
Aaron Egier
Thiagaraja Gopalsamy
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2007)
Keyphrases
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computationally efficient
computationally expensive
learning algorithm
data structure
memory usage
computationally intensive
real time
parallel hardware
main memory
high speed
memory requirements
efficient implementation
highly efficient
linear space
parallel architectures
memory footprint
image processing