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An internet-based IP protection scheme for circuit designs using linear feedback shift register (LFSR)-based locking.
Raju Halder
Parthasarathi Dasgupta
Saptarshi Naskar
Samar Sen-Sarma
Published in:
SBCCI (2009)
Keyphrases
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shift register
protection scheme
high speed
random number generator
hardware implementation
operating system
distance learning
processing units
real time
computer vision
efficient implementation