Low Complexity Implementation of OTFS Transmitter using Fully Parallel and Pipelined Hardware Architecture.
Sai Kumar DoraHimanshu B. MishraManodipan SahooPublished in: J. Signal Process. Syst. (2023)
Keyphrases
- low complexity
- hardware architecture
- hardware implementation
- processing elements
- hardware architectures
- parallel architecture
- motion estimation
- computational complexity
- lower complexity
- vlsi architecture
- distributed video coding
- parallel implementation
- associative memory
- mimo systems
- field programmable gate array
- parallel processing
- computer architecture
- multiple description coding
- image sequences