FPGA based design and implementation of low power dual edge triggered flipflop using dynamic signal driving scheme for memory applications.
L. PunithaJ. SundararajanPublished in: Microprocess. Microsystems (2020)
Keyphrases
- low power
- vlsi architecture
- cmos technology
- power consumption
- single chip
- low cost
- high speed
- power dissipation
- low power consumption
- logic circuits
- ultra low power
- vlsi implementation
- hardware design
- hardware architecture
- digital signal processing
- efficient implementation
- gate array
- design process
- low complexity
- analog to digital converter
- mixed signal
- power reduction
- circuit design
- hardware implementation
- design considerations
- general purpose
- computational power
- application specific
- delay insensitive
- nm technology
- signal processing