Right-half-plane zero removal technique for low-voltage low-power nested Miller compensation CMOS amplifier.
Ka Nang LeungPhilip K. T. MokWing-Hung KiPublished in: ICECS (1999)
Keyphrases
- low power
- low voltage
- cmos technology
- high power
- power consumption
- low cost
- high speed
- power management
- mixed signal
- single chip
- digital signal processing
- low power consumption
- power dissipation
- wide dynamic range
- vlsi circuits
- real time
- image sensor
- logic circuits
- gate array
- cmos image sensor
- delay insensitive
- parallel processing
- dynamic range
- design considerations
- focal plane