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High-Speed RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two.
William Diehl
Kris Gaj
Published in:
FCCM (2016)
Keyphrases
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high speed
block cipher
low power
real time
software implementation
efficient implementation
frame rate
high speed networks
key exchange protocol
hash functions
hardware implementation
key distribution
hardware architectures
image processing
field programmable gate array
authentication scheme