A low power and area efficient FIR filter chip for PRML read channels.

Byung G. Jo Jin Y. Kang Myung Hoon Sunwoo

Published in: ISCAS (4) (2001)

Keyphrases

low power
high speed
low cost
single chip
power consumption
mixed signal
low power consumption
cmos technology
multi channel
vlsi implementation
fir filters
logic circuits
image sensor
signal processor
digital signal processing
real time
cmos image sensor
nm technology
power reduction
power dissipation
circuit design