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Implementation of a fourth-generation 1.8-GHz dual-core SPARC V9 microprocessor.

Jason M. HartKyung T. LeeDennis ChenLik ChengChipai ChouAnand DixitDale GreenleyGregory GruberKenneth HoJesse HsuNaveen G. MalurJohn Wu
Published in: IEEE J. Solid State Circuits (2006)
Keyphrases
  • high speed
  • fourth generation
  • information systems
  • efficient implementation
  • wireless communication
  • circuit design
  • special purpose hardware
  • design methodology
  • floating point
  • instruction set