An intelligible implementation of FastSLAM2.0 on a low-power embedded architecture.
Albert A. Jiménez SerrataShufan YangRenfa LiPublished in: EURASIP J. Embed. Syst. (2017)
Keyphrases
- low power
- vlsi architecture
- cmos technology
- low cost
- power consumption
- high speed
- signal processor
- ultra low power
- low complexity
- high power
- single chip
- digital signal processing
- nm technology
- vlsi implementation
- mixed signal
- wireless transmission
- low power consumption
- design considerations
- gate array
- vlsi circuits
- real time
- low voltage
- logic circuits
- embedded systems
- wireless networks
- delay insensitive
- hardware implementation
- image sensor
- efficient implementation