Login / Signup
A power efficient register file architecture using master latch sharing.
Marek Wróblewski
Matthias Müller
Andreas Wortmann
Sven Simon
Wilhelm Pieper
Josef A. Nossek
Published in:
ISCAS (5) (2003)
Keyphrases
</>
power consumption
data sets
cost effective
software architecture
database
neural network
efficient implementation
real time
artificial intelligence
high speed
lightweight
file system
low power
network architecture
power management