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Low power area efficient adaptive FIR filter for hearing aids using distributed arithmetic architecture.
P. V. Praveen Sundar
Ranjith D.
T. Karthikeyan
Vinoth Kumar V.
Balajee J. M
Published in:
Int. J. Speech Technol. (2020)
Keyphrases
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low power
hearing aids
power consumption
vlsi architecture
low cost
high speed
vlsi implementation
cmos technology
fir filters
real time
noise reduction
logic circuits
wavelet transform
signal to noise ratio
feature extraction
filter design
mixed signal