A novel hardware accelerator architecture for MPEG-2/4 AAC encoder.
Yan-Chen LuChun-Fu ShenChi-Kuang ChenPublished in: ICME (2004)
Keyphrases
- real time
- hardware implementation
- hardware architecture
- mpeg standard
- vlsi implementation
- field programmable gate array
- software implementation
- hardware design
- vlsi architecture
- hardware software
- hardware and software
- pipeline architecture
- parallel architecture
- low cost
- dedicated hardware
- video sequences
- compressed domain
- multimedia
- processing units
- parallel implementation
- embedded systems
- rate distortion
- parallel processors
- computing platform
- low complexity
- mpeg avc