Experimental analysis of cache memories for interconnect controllers.
Tsang-Ling SheuYuan-Bao ShiehPublished in: LCN (1990)
Keyphrases
- high speed
- data access
- query processing
- main memory
- control system
- prefetching
- reinforcement learning
- hit rate
- associative memory
- embedded processors
- semantic caching
- cache management
- web caching
- cache replacement
- access patterns
- memory hierarchy
- data structure
- content addressable
- evolutionary robotics
- caching scheme
- distributed object
- garbage collection
- multiple queries
- interconnection networks
- replacement policy