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Comparative study of serial and parallel heuristics used to design combinational logic circuits.
Enrique Alba
Gabriel Luque
Carlos A. Coello Coello
Erika Hernández Luna
Published in:
Optim. Methods Softw. (2007)
Keyphrases
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logic circuits
comparative study
low power
functional decomposition
gate array
low cost
design process
power dissipation
case study
real time
pattern recognition
power consumption
shared memory
computer architecture