Implementation of a high-speed low-power 32-bit adder in 70nm technology.
Fatemeh KashfiSeid Mehdi FakhraiePublished in: ISCAS (2006)
Keyphrases
- low power
- nm technology
- high speed
- power dissipation
- power consumption
- logic circuits
- cmos technology
- vlsi architecture
- low cost
- signal processor
- bit parallel
- single chip
- digital signal processing
- wireless transmission
- high power
- ultra low power
- vlsi circuits
- frame rate
- image processing
- real time
- low power consumption
- power reduction
- delay insensitive
- image sensor
- signal processing
- analog to digital converter
- gate array