A 12-bit 30MS/s SAR ADC with VCO-Based Comparator and Split-and-Recombination Redundancy for Bypass Logic.

Sheng Chang Xiong Zhou Zhaoming Ding Qiang Li

Published in: ISCAS (2019)

Keyphrases

random access memory
synthetic aperture radar
analog to digital converter
modal logic
sar images
logical operations
logic programming
multi valued
classical logic
multiscale
automated reasoning
sar imagery
knowledge base
infrared
pac man