Low power design for on-chip networking processing system.
Jie JinLingling SunFeng GuoXiaojun WangPublished in: SoCC (2015)
Keyphrases
- low power
- single chip
- low power consumption
- low cost
- high speed
- mixed signal
- cmos technology
- power consumption
- power dissipation
- nm technology
- vlsi architecture
- ultra low power
- real time
- image sensor
- vlsi implementation
- gate array
- logic circuits
- power reduction
- digital signal processing
- circuit design
- vlsi circuits
- cmos image sensor
- signal processor
- design process
- wireless transmission
- long range
- multi channel