Reconfigurable universal SAD-multiplier array.
Humberto CalderonStamatis VassiliadisPublished in: Conf. Computing Frontiers (2005)
Keyphrases
- hardware implementation
- systolic array
- low cost
- reconfigurable architecture
- programmable logic
- floating point
- signal processing
- motion vectors
- field programmable gate array
- neural network
- general purpose
- data flow
- interior point methods
- type ii
- information retrieval
- hardware and software
- fixed point
- data structure
- focal plane
- image processing
- linear array
- direction of arrival
- multi objective evolutionary
- databases