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A low power LDO with high PSR over a wide frequency range based on an impedance attenuation buffer.
Jiajian Pei
Ping Sun
Shijun Li
Yao Xiao
Jianfeng Cai
Published in:
IEICE Electron. Express (2024)
Keyphrases
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low power
power consumption
high speed
low cost
low power consumption
single chip
high power
vlsi circuits
logic circuits
vlsi architecture
digital signal processing
wireless transmission
cmos technology
mixed signal
image sensor
gate array
power reduction
predictive state representations
signal processor