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DLAU: A Scalable Deep Learning Accelerator Unit on FPGA.
Chao Wang
Lei Gong
Qi Yu
Xi Li
Yuan Xie
Xuehai Zhou
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2017)
Keyphrases
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deep learning
field programmable gate array
machine learning
unsupervised learning
hardware implementation
unsupervised feature learning
weakly supervised
deep architectures
mental models
restricted boltzmann machine
parallel computing
learning algorithm
feature selection
object recognition
viewpoint