Login / Signup

Verification and Validation Activities for Embedded Systems - A Feasibility Study on a Reading Technique for SysML Models.

Erik Aceiro AntonioRafael RovinaSandra Camargo Pinto Ferraz Fabbri
Published in: ICEIS (2) (2014)
Keyphrases
  • embedded systems
  • low cost
  • computing power
  • embedded real time systems
  • real time
  • formal methods
  • safety critical
  • safety analysis
  • artificial intelligence
  • embedded devices
  • real time image processing
  • resource limited