Design and implementation of a 5×5 trits multiplier in a quasi-adiabatic ternary CMOS logic.

Diego Mateo Antonio Rubio

Published in: IEEE J. Solid State Circuits (1998)

Keyphrases

circuit design
implementation issues
micron cmos
chip design
case study
design process
efficient implementation
hardware design
single chip
hardware implementation
future development
logic circuits
modular design
parallel distributed
design decisions
design methodology