UVHM: Model Checking Based Formal Analysis Scheme for Hypervisors.
Yuchao SheHui LiHui ZhuPublished in: ICT-EurAsia (2013)
Keyphrases
- model checking
- formal analysis
- formal methods
- temporal logic
- model checker
- symbolic model checking
- formal specification
- finite state
- temporal properties
- partial order reduction
- formal verification
- automated verification
- verification method
- computation tree logic
- reachability analysis
- bounded model checking
- concurrent systems
- process algebra
- timed automata
- epistemic logic
- linear temporal logic
- transition systems
- asynchronous circuits
- agent model
- heuristic search
- reactive systems
- deterministic finite automaton
- pspace complete
- ban logic
- knowledge based systems