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A new full CMOS 2.5 V two-stage line driver with variable gain for ADSL applications.
Saeid Mehrmanesh
Seyed Mojtaba Atarodi
Hesam Amir Aslanzadeh
Saeed Saeedi
Amin Quasem Safarian
Published in:
ISCAS (4) (2004)
Keyphrases
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low cost
high speed
line segments
vlsi circuits
real time
power consumption
low power
circuit design
access network
delay insensitive