Node merging: A transformation on bit-level dependence graphs for efficient VLSI array design.

Bongjin Jung Wayne P. Burleson

Published in: ASAP (1993)

Keyphrases

directed graph
vlsi design
case study
high speed
design process
cost effective
engineering design
design methodology
graph theoretic
analog to digital converter
decision trees
programmable logic
single chip
design considerations
graph matching
signal processing
bayesian networks