Optimization of a fully integrated low power CMOS GPS receiver.
Peter J. VancorenlandPhilippe CoppejansWouter De CockPaul LerouxMichiel SteyaertPublished in: ICCAD (2002)
Keyphrases
- low power
- fully integrated
- power consumption
- high speed
- low cost
- single chip
- vlsi circuits
- cmos technology
- cmos image sensor
- vlsi architecture
- low power consumption
- mixed signal
- ultra low power
- power dissipation
- digital signal processing
- image sensor
- workflow management
- delay insensitive
- logic circuits
- power reduction
- gate array