Parsing and analysis of a Xilinx FPGA bitstream for generating new hardware by direct bit manipulation in real-time.
Rikus le RouxGeorge van SchoorPieter A. van VuurenPublished in: South Afr. Comput. J. (2019)
Keyphrases
- real time
- fpga device
- field programmable gate array
- hardware implementation
- high speed
- low cost
- bitstream
- data acquisition
- dedicated hardware
- hardware architecture
- fpga implementation
- pipelined architecture
- low power consumption
- bit rate
- xilinx virtex
- error correction
- embedded systems
- image data
- computational complexity
- image segmentation