An Efficient Hardware Implementation of a SAT Problem Solver on FPGA.
Teodor IvanEl Mostapha AboulhamidPublished in: DSD (2013)
Keyphrases
- hardware implementation
- sat problem
- sat solving
- weighted max sat
- field programmable gate array
- signal processing
- fpga implementation
- efficient implementation
- satisfiability problem
- max sat
- dedicated hardware
- hardware design
- constraint satisfaction problems
- sat solvers
- hardware architecture
- phase transition
- software implementation
- np complete
- clause learning
- boolean satisfiability
- fpga device
- unit propagation
- boolean formula
- image processing algorithms
- davis putnam
- randomly generated
- xilinx virtex
- fpga technology
- pipelined architecture
- neural network
- random sat instances
- parallel architecture
- sat instances
- reconfigurable hardware
- general purpose processors
- propositional satisfiability
- branch and bound
- constraint programming
- pattern recognition
- image processing
- machine learning