An Optimized VLSI Implementation of an IEEE 802.11n/ac/ax LDPC Decoder.
Saleh UsmanMohammad M. MansourPublished in: ISCAS (2020)
Keyphrases
- vlsi implementation
- low density parity check
- vlsi architecture
- ldpc codes
- distributed source coding
- distributed video coding
- low complexity
- physical layer
- decoding algorithm
- turbo codes
- error correction
- compressive sensing
- error concealment
- channel coding
- fir filters
- real time
- filter bank
- feature extraction
- transform domain
- low power
- associative memory
- multiresolution
- neural network