Glitch-conscious low-power design of arithmetic circuits.
Henrik ErikssonPer Larsson-EdeforsPublished in: ISCAS (2) (2004)
Keyphrases
- low power
- logic circuits
- power dissipation
- high speed
- power consumption
- cmos technology
- power reduction
- single chip
- low cost
- mixed signal
- digital signal processing
- low power consumption
- vlsi circuits
- vlsi architecture
- delay insensitive
- gate array
- high power
- multi channel
- design process
- circuit design
- real time
- wireless transmission
- ultra low power
- low voltage
- cmos image sensor