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Measuring the Routing Costs of FPGA Circuit Components.
Michael J. Wirthlin
Navaneethan Sundaramoorthy
Published in:
PDPTA (2000)
Keyphrases
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high speed
gate array
building blocks
shortest path
hardware implementation
power reduction
real time
low cost
signal processing
software systems
routing algorithm
network topology
total cost
routing problem
single chip
hardware architectures