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A 32 Gb/s ADC-based PAM-4 receiver with 2-bit/stage SAR ADC and partially-unrolled DFE.
Shiva Kiran
Shengchang Cai
Ying Luo
Sebastian Hoyos
Samuel Palermo
Published in:
CICC (2018)
Keyphrases
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analog to digital converter
decision feedback
high speed
sar images
image reconstruction
end to end
sigma delta