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24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS.
Skylar Skrzyniarz
Laura Fick
Jinal Shah
Yejoong Kim
Dennis Sylvester
David T. Blaauw
David Fick
Michael B. Henry
Published in:
ISSCC (2016)
Keyphrases
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analog vlsi
circuit design
analog to digital converter
high speed
linear programming
power consumption
low cost
focal plane
neural network
objective function
linear program
low power
cmos image sensor
multi view
vlsi circuits