Instruction visibility in SPEC CPU2017.

Andrei Rimsa Álvares José Nelson Amaral Fernando Magno Quintão Pereira

Published in: J. Comput. Lang. (2021)

Keyphrases

memory hierarchy
level parallelism
cache misses
benchmark suite
instruction set
multimedia
main memory
instructional design
learning disabled students
compression artifacts
computing power
prefetching
personal computer
computer technology
genetic algorithm
neural network
database