A < 1 pJ sub-VT cardiac event detector in 65 nm LL-HVT CMOS.
Joachim Neves RodriguesOmer Can AkgunViktor ÖwallPublished in: VLSI-SoC (2010)
Keyphrases
- cmos technology
- event detection
- silicon on insulator
- patient specific
- high speed
- nm technology
- power consumption
- analog vlsi
- low cost
- metal oxide semiconductor
- low power
- image processing
- power supply
- circuit design
- event recognition
- coronary artery
- ecg signals
- object detectors
- parallel processing
- low voltage
- delay insensitive
- news articles
- myocardial infarction
- detection algorithm
- three dimensional
- real time