A 0.1-pJ/b and ACF <0.04 Multiple-Valued PUF for Chip Identification Using Bit-Line Sharing Strategy in 65-nm CMOS.
Yuejun ZhangZhao PanPengjun WangDailu DingQiaoyan YuPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2019)
Keyphrases
- multiple valued
- nm technology
- random access memory
- cmos technology
- analog vlsi
- power consumption
- high speed
- multiple valued logic
- low power
- silicon on insulator
- low cost
- metal oxide semiconductor
- multi valued
- file organization
- circuit design
- boolean functions
- analog to digital converter
- power dissipation
- single chip
- cmos image sensor
- image sensor
- low voltage
- continuous attributes
- ibm power processor
- reinforcement learning
- valued logic
- focal plane
- neural network