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A low-voltage 1Mb FeRAM in 0.13μm CMOS featuring time-to-digital sensing for expanded operating margin in scaled CMOS.

Masood QaziMichael ClintonSteven BartlingAnantha P. Chandrakasan
Published in: ISSCC (2011)
Keyphrases
  • low voltage
  • cmos technology
  • mixed signal
  • design considerations
  • power line
  • random access memory
  • power management
  • power consumption
  • low power
  • circuit design
  • sensor networks
  • low cost
  • high speed