On-the-Fly Model Checking Under Fairness that Exploits Symmetry.
Viktor GyurisA. Prasad SistlaPublished in: Formal Methods Syst. Des. (1999)
Keyphrases
- model checking
- temporal logic
- automated verification
- partial order reduction
- temporal properties
- formal specification
- finite state
- formal verification
- model checker
- symbolic model checking
- finite state machines
- computation tree logic
- formal methods
- resource allocation
- transition systems
- timed automata
- process algebra
- linear temporal logic
- bounded model checking
- verification method
- pspace complete
- reachability analysis
- concurrent systems
- asynchronous circuits
- game theory
- symmetry breaking
- planning domains