Hazard-free Muller Gates for Implementing Asynchronous Circuits on Xilinx FPGA.
Cuong Pham-QuocAnh-Vu Dinh-DucPublished in: DELTA (2010)
Keyphrases
- asynchronous circuits
- field programmable gate array
- hardware implementation
- high speed
- fpga implementation
- hardware architecture
- pipelined architecture
- fpga device
- delay insensitive
- process algebra
- efficient implementation
- dedicated hardware
- embedded systems
- low cost
- hardware design
- model checking
- low power
- risk assessment
- parallel computing
- real time
- software implementation
- hardware description language
- hardware architectures
- fpga technology
- logic circuits
- signal processing
- verilog hdl
- single chip
- programmable logic
- computing systems
- decision making
- data sets