High-performance, low-power design techniques for dynamic to static logic interface.
June JiangKan LuUming KoPublished in: ISLPED (1997)
Keyphrases
- low power
- logic circuits
- low power consumption
- single chip
- low cost
- power consumption
- high speed
- signal processor
- user interface
- high power
- cmos technology
- vlsi architecture
- gate array
- design process
- digital signal processing
- mixed signal
- delay insensitive
- power reduction
- real time
- power dissipation
- wireless transmission
- ultra low power