Formal verification of internal block diagram of SysML for modeling real-time system.
Sajjad AliMuhammad Abdul Basit Ur RahimFahim ArifPublished in: SNPD (2015)
Keyphrases
- formal verification
- real time
- model checking
- modeling language
- automated verification
- low cost
- symbolic model checking
- program slicing
- control system
- bounded model checking
- safety analysis
- model checker
- formal methods
- safety critical
- block size
- temporal logic
- knowledge acquisition
- vision system
- web services
- artificial intelligence