Directed explicit-state model checking in the validation of communication protocols.
Stefan EdelkampStefan LeueAlberto Lluch-LafuentePublished in: Int. J. Softw. Tools Technol. Transf. (2004)
Keyphrases
- model checking
- communication protocols
- process algebra
- temporal logic
- finite state machines
- transition systems
- formal verification
- model checker
- partial order reduction
- reachability analysis
- bounded model checking
- computation tree logic
- temporal properties
- timed automata
- finite state
- symbolic model checking
- automated verification
- concurrent systems
- formal methods
- epistemic logic
- verification method
- communication protocol
- formal specification
- state space
- linear temporal logic
- asynchronous circuits
- pspace complete
- reactive systems