IP cores for hardware evolution of decision trees.
Rastislav J. R. StruharikVuk VranjkovicBogdan VukobratovicPublished in: SISY (2012)
Keyphrases
- decision trees
- multi core processors
- low cost
- address space
- real time
- parallel architectures
- rule induction
- internet protocol
- hardware and software
- vlsi implementation
- hardware design
- feature construction
- decision tree induction
- massively parallel
- predictive accuracy
- naive bayes
- machine learning
- processor core
- hardware implementation
- end to end
- data acquisition
- machine learning algorithms
- ip addresses
- network management
- hardware architecture
- decision tree algorithm
- attribute selection
- computing systems
- random forest
- computer systems
- data sets